(Reduced Instruction Set Computing)- A processor design based on the logic that a simplified instruction sets should provide higher performance as the simple instructions use only 1 processor cycle to perform. Most modern processors operate on a RISC architecture, with Intel (the originator of the CISC architecture:x86) having switched to a RISC core architecture coupled with an x86 decoder. See also: CISC, Architecture

RISC was last modified: February 1st, 2017 by James Piedra